本书系统地介绍了计算机系统的设计基础、指令集系统结构，流水线和指令集并行技术。层次化存储系统与存储设备。互连网络以及多处理器系统等重要内容。在这个最新版中，作者更新了单核处理器到多核处理器的历史发展过程的相关内容，同时依然使用他们广受好评的“量化研究方法”进行计算设计，并展示了多种可以实现并行性的技术，而这些技术可以看成是展现多处理器体系结构威力的关键!既可以作为高等院校计算机专业高年级本科生和研究生学习“计算机体系结构”和“计算机组成原理”等课程的教材或参考书，也可供与计算机相关的专业人士学习参考。

本书系统地介绍了计算机系统的设计基础、指令集系统结构，流水线和指令集并行技术。层次化存储系统与存储设备。互连网络以及多处理器系统等重要内容。在这个最新版中，作者更新了单核处理器到多核处理器的历史发展过程的相关内容，同时依然使用他们广受好评的“量化研究方法”进行计算设计，并展示了多种可以实现并行性的技术，而这些技术可以看成是展现多处理器体系结构威力的关键!在介绍多处理器时，作者不但讲解了处理器的性能，还介绍了有关的设计要素，包括能力、可靠性、可用性和可信性。

本书内容丰富，既介绍了当今计算机体系结构的最新研究成果，也引述了许多计算机系统设计开发方面的实践经验。另外，各章结尾还附有大量的习题和参考文献。本书既可以作为高等院校计算机专业高年级本科生和研究生学习“计算机体系结构”和“计算机组成原理”等课程的教材或参考书，也可供与计算机相关的专业人士学习参考。

Foreword

Preface

Acknowledgments

Chapter1FundamentalsofComputerDesign

1.1Introduction

1.2ClassesofComputers

1.3DefiningComputerArchitecture

1.4TrendsinTechnology

1.5TrendsinPowerinIntegratedCircuits

1.6TrendsinCost

1.7Dependability

1.8Measuring,Reporting,andSummarizingPerformance

1.9QuantitativePrinciplesofComputerDesign

1.10PuttingItAllTogether:PerformanceandPrice-Performance

1.11FallaciesandPitfalls

1.12ConcludingRemarks

1.13HistoricalPerspectivesandReferencesCaseStudieswithExercisesbyDianaFranklin

Chapter2Instruction-LevelParallelismandItsExploitation

2.1Instruction-LevelParallelism:ConceptsandChallenges

2.2BasicCompilerTechniquesforExposinglLP

2.3ReducingBranchCostswithPrediction

2.4OvercomingDataHazardswithDynamicScheduling

2.5DynamicScheduling:ExamplesandtheAlgorithm

2.6Hardware-BasedSpeculation

2.7ExploitinglLPUsingMultipleIssueandStaticScheduling

2.8ExploitinglLPUsingDynamicScheduling,MultipleIssue,andSpeculation

2.9AdvancedTechniquesforInstructionDeliveryandSpeculation

2.10PuttingItAIITogether:TheIntelPentium4

2.11FallaciesandPitfalls

2.12ConcludingRemarks

2.13HistoricalPerspectiveandReferencesCaseStudieswithExercisesbyRobertRColwell

Chapter3LimitsonInstruction-LevelParallelism

3.1Introduction

3.2StudiesoftheLimitationsoflLP

3.3LimitationsOnlLPforRealizableProcessors

3.4CrosscuttingIssues:HardwareversusSoftwareSpeculation

3.5Multithreading:UsinglLPSupporttoExploitThread-LevelParallelism

3.6PuttingItAllTogether:PerformanceandEfficiencyinAdvancedMultiple-IssueProcessors

3.7FallaciesandPitfalls

3.8ConcludingRemarks

3.9HistoricalPerspectiveandReferencesCaseStudywithExercisesbyWen-meiW.HwuandJohnW.Sias

Chapter4MultiprocessorsandThread-LevelParallelism

4.1Introduction

4.2SymmetricShared-MemoryArchitectures

4.3PerformanceofSymmetricShared-MemoryMultiprocessors

4.4DistributedSharedMemoryandDirectory-BasedCoherence

4.5Synchronization:TheBasics

4.6ModelsofMemoryConsistency:AnIntroduction

4.7CrosscuttingIssues

4.8PuttingItAllTogether:TheSunT1Multiprocessor

4.9FallaciesandPitfalls

4.10ConcludingRemarks

4.11HistoricalPerspectiveandReferencesCaseStudieswithExercisesbyDavidA.Wood

Chapter5MemoryHierarchyDesign

5.1Introduction

5.2ElevenAdvancedOptimizationsofCachePerformance

5.3MemoryTechnologyandOptimizations

5.4Protection:VirtualMemoryandVirtualMachines

5.5CrosscuttingIssues:TheDesignofMemoryHierarchies..

5.6PuttingItAlITogether:AMDOpteronMemoryHierarchy

5.7FallaciesandPitfalls

5.8ConcludingRemarks

5.9HistoricalPerspectiveandReferencesCaseStudieswithExercisesbyNormanRJouppi

Chapter6StorageSystems

6.1Introduction

6.2AdvancedTopicsinDiskStorage

6.3DefinitionandExamplesofRealFaultsandFailures

6.4I/0Performance,ReliabilityMeasures,andBenchmarks

6.5ALittleQueuingTheory

6.6CrosscuttingIssues

6.7DesigningandEvaluatinganI/0System--TheInternetArchiveCluster

6.8PuttingItAllTogether:NetAppFAS6000Filer

6.9FallaciesandPitfalls

6.10ConcludingRemarks

6.11HistoricalPerspectiveandReferencesCaseStudieswithExercisesbyAndreaC.Arpaci-DusseauandRemziH.Arpaci-Dusseau

AppendixAPipelining:BasicandIntermediateConcepts

A.1Introduction

A.2TheMajorHurdleofPipelining--PipelineHazards

A.3HowIsPipeliningImplemented?

A.4WhatMakesPipeliningHardtoImplement?

A.5ExtendingtheMIPSPipelinetoHandleMulticycleOperations

A.6PuttingItAIITogether:TheMIPSR4000Pipeline

A.7CrosscuttingIssues

A.8FallaciesandPitfalls

A.9ConcludingRemarks

A.10HistoricalPerspectiveandReferences

AppendixBInstructionSetPrindplesandExamples

B.1Introduction

B.2ClassifyingInstructionSetArchitectures

B.3MemoryAddressing

B.4TypeandSizeofOperands

B.5OperationsintheInstructionSet

B.6InstructionsforControlFlow

B.7EncodinganInstructionSet

B.8CrosscuttingIssues:TheRoleofCompilers

B.9PuttingItAllTogether:TheMIPSArchitecture

B.10FallaciesandPitfalls

B.11ConcludingRemarks

B.12HistoricalPerspectiveandReferences

AppendixCReviewofMemoryHierarchy

C.1Introduction

C.2CachePerformance

C.3SixBasicCacheOptimizations

C.4VirtualMemory

C.5ProtectionandExamplesofVirtualMemory

C.6FallaciesandPitfalls

C.7ConcludingRemarks

C.8HistoricalPerspectiveandReferences

CompanionCDAppendices

AppendixDEmbeddedSystems

UpdatedbyThomasM.Conte

AppendixEInterconnectionNetworks

RevisedbyTimothyMPinkstonandJoseDuato

AppendixFVectorProcessors

RevisedbyKrsteAsanovic

AppendixGHardwareandSoftwareforVL!WandEPIC

AppendixHLarge-ScaleMultiprocessorsandScientificApplications

AppendixIComputerArithmetic

byDavidGoldberg

AppendixJSurveyofInstructionSetArchitectures

AppendixKHistoricalPerspectivesandReferences

OnlineAppendix(textbooks.elsevier,com/O123704901)

AppendixLSolutionstoCaseStudyExercises

References

Index