本书在内容体系上,先以符号和框图的形式讨论基本逻辑运算,分析组合逻辑电路及时序逻辑电路,在读者理解了数字电路的基本原理之后,再来讨论门电路及触发器的内部电路和电特性;同时,硬件描述语言(AHDL和VHDL)贯穿于各章节之中,不仅用来描述基本逻辑器件,而且用于设计简单的数字系统。此外,本书给出了丰富的例题、复习题、习题,每章末还有小结及重要术语,便于教学和自学。本书可作为电子工程、计算机、信息技术等相关专业数字系统课程的教材及数字电路课程的主要参考书,也可供相关专业的工程技术人员参考。
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书名 | 数字系统原理与应用(附光盘英文版第10版)/经典原版书库 |
分类 | |
作者 | (美)托茨 |
出版社 | 机械工业出版社 |
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简介 | 编辑推荐 本书在内容体系上,先以符号和框图的形式讨论基本逻辑运算,分析组合逻辑电路及时序逻辑电路,在读者理解了数字电路的基本原理之后,再来讨论门电路及触发器的内部电路和电特性;同时,硬件描述语言(AHDL和VHDL)贯穿于各章节之中,不仅用来描述基本逻辑器件,而且用于设计简单的数字系统。此外,本书给出了丰富的例题、复习题、习题,每章末还有小结及重要术语,便于教学和自学。本书可作为电子工程、计算机、信息技术等相关专业数字系统课程的教材及数字电路课程的主要参考书,也可供相关专业的工程技术人员参考。 内容推荐 本书是三位作者多年教授“数字原理与应用”课程的教学经验的总结,从1970年到2006年,已经出版到第10版。事实证明这是一本广受教师和学生欢迎的教材。本书对现代数字系统的原理和技术进行了全面的论述,既讲述了数字系统的基本原理,又涵盖了应用数字电路设计中传统的和最新的设计方法及开发技术,包括如何处理系统层面的设计问题。另外,在提供数字电路和系统的所有重要基础内容的同时,还介绍了现在以及未来职业生涯中所需的很多实用工具。 目录 CHAPTER 1 Introductory Concepts 1-1 Numerical Representations 1-2 Digital and Analog Systems 1-3 Digital Number Systems 1-4 Representing Binary Quantities 1-5 Digital Circuits/Logic Circuits 1-6 Parallel and SerialTransmission 1-7 Memory 1-8 Digital Computers CHAPTER 2 Number Systems and Codes 2-1 Binary-to-Decimal Conversions 2-2 Decimal-to-Binary Conversions 2-3 Hexadecimal Number System 2-4 BCD Code 2-5 The Gray Code 2-6 Putting It All Together 2-7 The Byte, Nibble, and Word 2.8 Alphanumeric Codes 2-9 Parity Method for Error Detection 2-10 Applications Chapter 3 Describing Logic Circuits 3-1 Boolean Constants andVariables 3-2 Truth Tables 3-3 OR Operation with OR Gates 3-4 AND Operation with AND Gates 3-5 NOT Operation 3-6 Describing Logic Circuits Algebraically 3-7 Evaluating Logic-Circuit Outputs 3-8 Implementing Circuits from Boolean Expressions 3-9 NOR Gates and NAND Gates 3-10 Boolean Theorems 3-11 DeMorgan's Theorems 3-12 Universality of NAND Gates and NOR Gates 3-13 Alternate Logic-Gate Representations 3-14 Which Gate Representation to Use 3-15 IEEE/ANSI Standard Logic Symbols 3-16 Summary of Methods to Describe Logic Circuits 3-17 Description Languages Versus Programming Languages 3-18 Implementing Logic Circuits with PLDs 3-19 HDL Format and Syntax 3-20 Intermediate Signals Chapter 4 Combinational Logic Circuits 4-1 Sum-of-Products Form 4-2 Simplifying Logic Circuits 4-3 Algebraic Simplification 4-4 Designing Combinational Logic Circuits 4-5 Karnaugh Map Method 4-6 Exclusive-OR and Exclusive-NOR Circuits 4-7 Parity Generator and Checker 4-8 Enable/Disable Circuits 4-9 Basic Characteristics of Digital ICs 4-10 Troubleshooting Digital Systems 4-11 Internal Digital IC Faults 4-12 External Faults 4-13 Troubleshooting Case Study 4-14 Programmable Logic Devices 4-15 Representing Data in HDL 4-16 Truth Tables Using HDL 4-17 Decision Control Structures in HDL Chapter 5 Rip-Flops and Related Devices 5-1 NAND Gate Latch 5-2 NOR Gate Latch 5-3 Troubleshooting Case Study 5-4 Digital Pulses 5-5 Clock Signals and Clocked Flip-Flops 5-6 Clocked S-R Flip-Flop 5-7 Clocked J-K Flip-Flop 5-8 Clocked D Flip-Flop 5-9 D Latch (Transparent Latch 5-10 Asynchronous Inputs 5-11 IEEE/ANSI Symbols 5-12 Flip-Flop Timing Considerations 5-13 Potential Timing Problem in FF Circuits 5-14 Flip-Flop Applications 5-15 Flip-Flop Synchronization 5-16 Detecting an Input Sequence 5-17 Data Storage and Transfer 5-18 Serial Data Transfer: Shift Registers 5-19 Frequency Division and Counting 5-20 Microcomputer Application 5-21 Schmitt-Trigger Devices 5-22 One-Shot (Monostable Multivibrator) 5-23 Clock Generator Circuits 5-24 Troubleshooting Flip-Flop Circuits 5-25 Sequential Circuits Using HDL 5-26 Edge-Triggered Devices 5-27 HDL Circuits with Multiple Components Chapter 6 Digital Arithmetic Operations and Circuits 6-1 Binary Addition 6-2 Representing Signed Numbers 6-3 Addition in the 2's-Complement System 6-4 Subtraction in the 2's-Complement System 6-5 Multiplication of Binary Numbers 6-6 Binary Division 6-7 BCD Addition 6-8 Hexadecimal Arithmetic 6-9 Arithmetic Circuits 6-10 Parallel Binary Adder 6-11 Design of a Full Adder 6-12 Complete ParallelAdder with Registers 6-13 Carry Propagation 6-14 Integrated-Circuit Parallel Adder 6-15 2's-Complement System 6-16 ALU Integrated Circuits 6-17 Troubleshooting Case Study 6-18 Using TTL Library Functions with HDL 6-19 Logical Operations on Bit Arrays 6-20 HDL Adders 6-21 Expanding the Bit Capacity of a Circuit Chapter 7 Counters and Registers 7-1 Asynchronous (Ripple) Counters 7-2 Propagation Delay in Ripple Counters 7-3 Synchronous (Parallel) Counters 7-4 Counters with MOD Numbers <2N 7-5 Synchronous Down and Up/Down Counters 7-6 Presettable Counters 7-7 IC Synchronous Counters 7-8 Decoding a Counter 7-9 Analyzing Synchronous Counters 7-10 Synchronous Counter Design 7-11 Basic Counters Using HDLS 7-12 Full-Featured Counters in HDL 7-13 Wiring HDL Modules Together 7-14 State Machines 7-15 Integrated-Circuit Registers 7-16 Parallel In/Parallel Out--The 74ALS174/74HC174 7-17 Serial In/Serial Out--The 74ALS166174HC166 7-18 Parallel In/Serlal Out--The 74ALS165174HC165 7-19 Serial In/Parallel Out--The 74ALS164/74HC164 7-20 Shift-Register Counters 7-21 Troubleshooting 7-22 HDL Registers 7-23 HDL Ring Counters 7-24 HDL One-Shots Chapter 8 Integrated-Circuit Logic Families 8-1 Digital IC Terminology 8-2 The TTL Logic Family 8-3 TTL Data Sheets 8-4 TTL Series Characteristics 8-5 TTL Loading and Fan-Out 8.6 Other TTL Characteristics 8-7 MOS Technology 8-8 Complementary MOS Logic 8-9 CMOS Series Characteristics 8-10 Low-VoltageTechnology 8-11 Open-Collector/Open-Drain Outputs 8-12 Tristate (Three-State) Logic Outputs 8-13 High-Speed Bus Interface Logic 8-14 The ECL Digital IC Family 8-15 CMOS Transmission Gate (Bilateral Switch) 8-16 IC Interfacing 8-17 Mixed-Voltage Interfacing 8-18 Analog Voltage Comparators 8-19 Troubleshooting Chapter 9 MSI Logic Circuits 9-1 Decoders 9-2 BCD-to-7-Segment Decoder/Drivers 9-3 Liquid-Crystal Displays 9-4 Encoders 9-5 Troubleshooting 9-6 Multiplexers (Data Selectors) 9-7 Multiplexer Applications 9-8 Demultiplexers (Data Distributors) 9-9 More Troubleshooting 9-10 Magnitude Comparator 9-11 Code Converters 9-12 Data Busing 9-13 The 74ALS173/HC173 Tristate Register 9-14 Data Bus Operation 9-15 Decoders Using HDL 9-16 The HDL 7-Segment Decoder/Driver 9-17 Encoders Using HDL 9-18 HDL Multiplexers and Demultiplexers 9-19 I-IDL Magnitude Comparators 9-20 HDL Cnde Converters Chapter 10 Digital System Projects Using HDL 10-1 Small-Project Management 10-2 Stepper Motor Driver Project 10-3 Keypad Encoder Project 10-4 Digital Clock Project 10-5 Frequency Counter Project Chapter 11 Interfacing with the Analog World 11-1 Review of DigitalVersus Analog 11-2 Digital-to-Analog Conversion 11-3 D/A-Converter Circuitry 11-4 DAC Specifications 11-5 An Integrated-Circuit DAC 11-6 DAC Applications 11-7 Troubleshooting DACs 11-8 Analog-to-Digital Conversion 11-9 Digital-Ramp ADC 11-10 Data Acquisition 11-11 Successive-Approximation ADC 11-12 Flash ADCs 11-13 Other A/D Conversion Methods 11-14 Sample-and-Hold Circuits 11-15 Multiplexing 11-16 Digital Storage Oscilloscope 11-17 Digital Signal Processing (DSP) Chapter 12 Memory Devices 12-1 Memory Terminology 12-2 General Memory Operation 12-3 CPU-Memory Connections 12-4 Read-Only Memories 12-5 ROM Architecture 12-6 ROMTiming 12-7 Types of ROMs 12-8 Flash Memory 12.9 ROM Applications 12-10 Semiconductor RAM 12.11 RAM Architecture 12-12 Static RAM (SRAM) 12-13 Dynamic RAM (DRAM) 12-14 Dynamic RAM Structure and Operation 12-15 DRAM Read/Write Cycles 12-16 ~DRAM Refreshing 12-17 DRAM Technology 12-18 Expanding Word Size and Capacity 12-19 Special Memory Functions 12-20 Troubleshooting RAM Systems 12-21 Testing ROM Chapta 13 Programmable Logic DeviceArchitectures 13-1 Digital Systems Family Tree 13-2 Fundamentals of PLD Circuitry 13-3 PLD Architectures 13-4 The GAL 16V8(Generic Array Logic) 13-S The AItera EPM7128S CPLD 13-6 The A1tera FLEXl0K Flamily 13-7 The AItera Cydone Family Glossary Answersto Selected Problau Index of ICs Index |
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